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P0 Flight Recorder Hardening: coherent event snapshots, exact MAC causes, negligible idle overhead - #262

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masarray wants to merge 6 commits into
fix/p0-sv-sync-onboard-flight-recorder-20261020from
fix/p0-flight-recorder-race-timestamp-20261020
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masarray wants to merge 6 commits into
fix/p0-sv-sync-onboard-flight-recorder-20261020from
fix/p0-flight-recorder-race-timestamp-20261020

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@masarray

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Follow-up exact-source audit of #261 requested before physical use. This tightens a few diagnostic accuracy and performance edges without changing PTP/SV authority/LOCK thresholds, ISR, 4kHz sample generation or packet format.

  • In-memory ring slot invalidation before overwriting time/event context; read-side double checks publication stamp, excludes partially overwritten slots.
  • Every lock edge now retains event-local phase error and MAC measured pairs, rather than only the latest unrelated 1Hz snapshot. Missing timestamps for control-plane STOP, GM role and mode events are filled using esp_timer_get_time() ONLY after a real edge and ONLY on ESP target; portable tests use supplied clocks.
  • Diagnose MAC TX failure classes separately: missing HW TX stamp, unqualified sample epoch, publisher discontinuity, PTP clock step/source change, baseline reacquisition, and canonical transmit failure; no longer obscure them all as generic MAC error.
  • Telemetry checks a single 32-bit counter once/second; only allocates a bounded stack snapshot and emits one warning after an actual edge. No logging on per-frame publisher / ISR, no new task/heap/file I/O, no EEPROM wear. 16 fixed event slots.
  • Extended GCC/Clang/MSVC production firmware resolver regressions for event-local timestamp/phase/MAC, history wrapping, and distinct causes. New code must pass exact SHA firmware ESP32-P4 and Native Studio Preview packaging before distribution.

Important: this is observability hardening, not demonstrated interoperation or timing overhead benchmark. Need hardware latency/jitter & new Studio capture for release.

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📝 Code Review ⚠️ Failed 2026-10-20T08:18:32.169577Z 8fd836a PR opened
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