All pull requests

Pull requests

• P0-B: atomic running 4I+4V live setpoints with firmware commit/readback

  #253·masarray opened Oct 19, 2026Owner·

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• P0-A transactional 4I+4V START, firmware ACK/readback, safe STOP and independent SV PCAP evidence

  #252·masarray opened Oct 19, 2026Owner·

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  3

• P0 SMV: atomic 8-channel firmware scenario commit with token/hash ACK and verified START

  #251·masarray opened Oct 19, 2026Owner·

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  5

• P0 Studio: cancel queued SV START with bounded priority STOP and block bare START

  #250·masarray opened Oct 19, 2026Owner·

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  3

• P0 Studio: fix live GUI frequency and channel ENABLE delivery; define on-wire acceptance

  #249·masarray opened Oct 19, 2026Owner·

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  4

• P0 SMV SSOT reliability: concurrent snapshot safety and fail-closed START

  #248·masarray opened Oct 19, 2026Owner·

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  6

• P0 Studio: reliable ESP32-P4 reconnect and truthful firmware detection on startup

  #247·masarray opened Oct 18, 2026Owner·

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  6

• P0 SMV: qualify SOURCE smpSynch AUTO within ~6–10s without forced metadata

  #246·masarray opened Oct 18, 2026Owner·

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  10

• P0 Studio UX: authoritative 4I+4V START, compact vertical layout and readable controls

  #241·masarray opened Oct 18, 2026Owner·

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  4

• Studio P0: preserve SV/PTP milestone; exact 4I+4V START snapshot and polished operator layout

  #240·masarray opened Oct 18, 2026Owner·

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  5

• P0 Studio operator UX: table-as-wire SSOT, visible injector title, stacked 4I+4V, centered controls

  #239·masarray opened Oct 18, 2026Owner·

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  5

• Studio P0 UX: always send visible 4I+4V on START; stacked tables and control polish

  #238·masarray opened Oct 17, 2026Owner·

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  4

• P0 Studio UI polish: exact table-to-SV START, stacked 4V/4I, readable controls

  #237·masarray opened Oct 17, 2026Owner·

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  6

• P0 Studio UX: exact 4I+4V START, vertical matrices, default PTP and centered controls

  #236·masarray opened Oct 17, 2026Owner·

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  8

• P0: ship Studio Preview with matching PTP–SV phase-evidence firmware, not obsolete v0.1.1

  #234·masarray opened Oct 17, 2026Owner·

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  3

• P0 Workbench Reports: port ARIEC61850 fail-closed SCL semantic member binding

  #230·masarray opened Oct 17, 2026Owner·

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  26

• P0 Workbench Reports: verified GVAA DO→DA labels, q/t details and fail-closed type binding

  #228·masarray opened Oct 17, 2026Owner·

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  24

• Workbench Reports UX: replace opaque MMS struct strings with bounded, expandable typed rows

  #219·masarray opened Oct 17, 2026Owner·

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  16

• M2I: validate selected native Quality/TimeQuality with rendered GUI evidence

  #172·masarray opened Oct 14, 2026Owner·

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  3

• M3C.1: bind SV sample-zero epochs to consecutive PTP seconds

  #166·masarray opened Oct 14, 2026Owner·

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  10

• M2D-1: typed IEC 61850 Quality and TimeQuality in native Workbench

  #164·masarray opened Oct 14, 2026Owner·

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• M2A: bounded continuous PTP–SMV phase authority and guarded ESP32-P4 observer

  #157·masarray opened Oct 14, 2026Owner·5 of 8 tasks·

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  1

• M1: standards-aligned PTP source defaults and fail-closed SV epoch startup

  #153·masarray opened Oct 14, 2026Owner·

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• Docs: GUI/UX recovery handoff for next thread (R1B blocker and exit gates)

  #138·masarray opened Sep 27, 2026Owner·

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• R1B: preserve exact Static Reporting route through live report attach

  #137·masarray opened Sep 27, 2026Owner·

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