JavaScript library for working with automata and grammars for regular and context-free languages
Communicating Sequential Processes in Lua
A tiny event-based finite state machine
This is a project I did during my Digital Design Course
A state machine framework aimed for machine intelligence
Library for logic-labelled finite-state machines
For STM32F407 "black_board" FSMC 16bit LCD connection and SPI touchpad
Este repositório reúne as resoluções do Bloco de Controle e Datapath da 1° lista de exercícios da disciplina de Sistemas Digitais. As questões fazem parte da mesma lista utilizada no Bloco 1, tendo sido separadas em um repositório próprio devido à quantidade de exercícios e ao nível de aprofundamento
Logic & Digital Designs — VHDL — (Course: Logic Design / Digital Circuits, Semester X): small combinational and sequential VHDL designs (adders, encoders, counters, FSMs) with testbenches and waveforms, plus report.
Welcome to my collection of Digital Design & VLSI projects implemented in Verilog/SystemVerilog. This repo is a structured portfolio of my learning journey from basic combinational circuits → sequential designs → FSMs → CMOS-level projects → mini processors.
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