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CHIPS Alliance

Common Hardware for Interfaces, Processors and Systems
README.md

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🔗 chipsalliance.org | 📫 info@chipsalliance.org

The CHIPS Alliance develops high-quality, open source hardware designs and tools relevant to ASICs and FPGAs. By creating an open and collaborative environment, CHIPS Alliance shares resources to lower the cost of development. Companies and individuals can work together to develop open source CPUs, various peripherals, and complex IP blocks, as well as open source hardware or software tools to accelerate the creation of more efficient and innovative chip designs.

The CHIPS Alliance hosts multiple open source Projects.

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  1. chisel chisel Public

    Chisel: A Modern Hardware Design Language

    Scala 4.8k 661

  2. rocket-chip rocket-chip Public

    Rocket Chip Generator

    Scala 3.9k 1.3k

  3. verible verible Public

    Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server

    C++ 2k 309

  4. riscv-dv riscv-dv Public

    Random instruction generator for RISC-V processor verification

    Python 1.4k 402

  5. Cores-VeeR-EH1 Cores-VeeR-EH1 Public

    VeeR EH1 core

    SystemVerilog 971 245

  6. firrtl firrtl Public archive

    Flexible Intermediate Representation for RTL

    Scala 748 180

Repositories

Showing 10 of 122 repositories
  • sv-tests Public

    Test suite designed to check compliance with the SystemVerilog standard.

    chipsalliance/sv-tests's past year of commit activity
    SystemVerilog 399 ISC 105 49 (4 issues need help) 34 Updated Oct 14, 2026
  • caliptra-ss Public

    HW Design Collateral for Caliptra Subsystem, which comprises Caliptra RoT IP and additional manufacturer controls.

    chipsalliance/caliptra-ss's past year of commit activity
    SystemVerilog 54 Apache-2.0 64 116 51 Updated Oct 14, 2026
  • caliptra-mcu-sw Public

    Caliptra MCU Software

    chipsalliance/caliptra-mcu-sw's past year of commit activity
    Rust 42 Apache-2.0 92 173 (5 issues need help) 91 Updated Oct 14, 2026
  • caliptra-sw Public

    Caliptra software (ROM, FMC, runtime firmware), and libraries/tools needed to build and test

    chipsalliance/caliptra-sw's past year of commit activity
    Rust 171 Apache-2.0 130 239 (8 issues need help) 82 Updated Oct 14, 2026
  • sv-tests-results Public

    Output of the sv-tests runs.

    chipsalliance/sv-tests-results's past year of commit activity
    HTML 10 9 0 0 Updated Oct 14, 2026
  • chisel Public

    Chisel: A Modern Hardware Design Language

    chipsalliance/chisel's past year of commit activity
    Scala 4,809 Apache-2.0 661 356 (1 issue needs help) 162 Updated Oct 13, 2026
  • Cores-VeeR-EL2 Public

    VeeR EL2 Core

    chipsalliance/Cores-VeeR-EL2's past year of commit activity
    SystemVerilog 346 Apache-2.0 114 46 16 Updated Oct 13, 2026
  • rocket-pcblib Public
    chipsalliance/rocket-pcblib's past year of commit activity
    2 Apache-2.0 1 0 0 Updated Oct 13, 2026
  • caliptra-rtl Public

    HW Design Collateral for Caliptra RoT IP

    chipsalliance/caliptra-rtl's past year of commit activity
    SystemVerilog 158 Apache-2.0 109 124 (2 issues need help) 44 Updated Oct 13, 2026
  • usb2 Public

    USB core

    chipsalliance/usb2's past year of commit activity
    VHDL 1 Apache-2.0 6 23 2 Updated Oct 13, 2026
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