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Antmicro

Antmicro is a software-driven tech company developing open and modern industrial edge and cloud AI systems.

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  1. jetson-orin-baseboard jetson-orin-baseboard Public

    Baseboard targetting the NVIDIA Jetson Orin Nano and Jetson Orin NX

    296 85

  2. renode renode Public

    Forked from renode/renode

    Renode - virtual development tool for multinode embedded networks

    RobotFramework 48 4

  3. tensorflow-arduino-examples tensorflow-arduino-examples Public

    TensorFlow Lite Micro examples built in collaboration between Google and Antmicro, runnable in Google Colab and with Renode CI tests

    Shell 30 4

  4. fastvdma fastvdma Public

    Antmicro's fast, vendor-neutral DMA IP in Chisel

    Scala 132 28

  5. polarfire-som polarfire-som Public

    System on Module based on Microchip PolarFire MPFS250T SoC

    40 17

  6. jetson-agx-thor-baseboard jetson-agx-thor-baseboard Public

    Open hardware baseboard for Nvidia Jetson Thor AGX T5000 System on Module

    45 12

Repositories

Showing 10 of 891 repositories
  • verilator Public Forked from verilator/verilator

    Verilator open-source SystemVerilog simulator and lint system

    antmicro/verilator's past year of commit activity
    SystemVerilog 28 948 0 0 Updated Oct 15, 2026
  • Cores-VeeR-EL2 Public Forked from chipsalliance/Cores-VeeR-EL2

    VeeR EL2 Core

    antmicro/Cores-VeeR-EL2's past year of commit activity
    SystemVerilog 2 Apache-2.0 116 0 1 Updated Oct 15, 2026
  • renode-test-action Public

    GitHub Action allowing to run tests in the Renode framework

    antmicro/renode-test-action's past year of commit activity
    Python 22 Apache-2.0 7 0 2 Updated Oct 15, 2026
  • renode Public Forked from renode/renode

    Renode - virtual development tool for multinode embedded networks

    antmicro/renode's past year of commit activity
    RobotFramework 48 545 0 0 Updated Oct 15, 2026
  • bazel_rules_hdl Public Forked from hdl/bazel_rules_hdl

    Hardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc) rules for Bazel (https://bazel.build)

    antmicro/bazel_rules_hdl's past year of commit activity
    Starlark 0 Apache-2.0 64 0 0 Updated Oct 15, 2026
  • f4pga-arch-defs Public Forked from f4pga/f4pga-arch-defs

    FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.

    antmicro/f4pga-arch-defs's past year of commit activity
    Jupyter Notebook 1 ISC 127 0 10 Updated Oct 15, 2026
  • rdfm Public
    antmicro/rdfm's past year of commit activity
    Python 54 Apache-2.0 12 0 0 Updated Oct 15, 2026
  • verilator-verification Public

    Test dashboard for verification features in Verilator

    antmicro/verilator-verification's past year of commit activity
    SystemVerilog 35 Apache-2.0 4 1 0 Updated Oct 15, 2026
  • verible-indexer Public
    antmicro/verible-indexer's past year of commit activity
    Python 6 Apache-2.0 3 0 0 Updated Oct 15, 2026
  • riscv-dv Public Forked from chipsalliance/riscv-dv

    SV/UVM based instruction generator for RISC-V processor verification

    antmicro/riscv-dv's past year of commit activity
    Python 0 Apache-2.0 410 0 1 Updated Oct 14, 2026
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