This repository contains laboratory projects based on the course "Fast Prototypes of Digital Systems" at NCHU. It is specifically designed for the EGO1 FPGA model, showcasing a range of applications and functionalities explored through these projects.
- Lab_1: Flash LED
- Lab_2: 7 Segment Display Counter
- Lab_3: 7 Segment Display Switch Control
- Lab_4: 7 Segment Display Snake
- Lab_5: Button Debouncing & Data Path
- Lab_6: Static VGA: Display Specific Pattern
- Lab_7: Dynamic VGA: Snake Game
- Ten_Point_Half: Press middle button to get a new point As tradional rule of ten point half poker game
- Polish_notation: It is just a PN algorithm implemented in hareware
Each lab folder contains Verilog code and XDC files tailored for the EGO1 FPGA. For some labs, there are two versions of Verilog code, labeled as 'a' and 'b', which represent different but similar functionalities.
- Verilog Code: The main programming files written in Verilog for FPGA development.
- XDC Files: Constraint files that configure the pin assignments and other settings for the FPGA.